Communication systems are constantly evolving to, for example, transfer and process information at faster rates. This may be accomplished by improving data-rate compatibility between communication interfaces and internal logic circuits of a receiver or transmitter.
Generally, as the bit rates of communication interfaces (e.g., Fiber Channel, Peripheral Component Interconnect (PCI)-Express, Serial Advanced Technology Attachment (SATA)) increase, the task of developing faster logic circuits becomes more challenging. These logic circuits include data storage elements and samplers as well as others found in the front end of receivers. Designers often seek to improve the efficiency of communications between these elements, and further seek to reduce power consumption particularly in clocking networks that support the interface and logic circuits of communication systems running at high bit rates.